RISC - vertaling naar russisch
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RISC - vertaling naar russisch

PROCESSOR EXECUTING ONE INSTRUCTION IN MINIMAL CLOCK CYCLES
Reduced Instruction Set Computer; RISC processor; Reduced Instruction Set Code; Reduced Instruction Set Computing; RISC; RISC-based; RISC-based system; RISC System/6000 SP; Reduced instruction set; RISC architectures; RISC instruction set; RISC-based computer design approach; RISC principles; Reduced instruction set computing
  • An IBM [[PowerPC 601]] RISC microprocessor
  • The [[Sun Microsystems]] UltraSPARC processor is a type of RISC microprocessor.
  • RISC-V prototype chip (2013).

RISC         
WIKIMEDIA DISAMBIGUATION PAGE
Risc
сокр. от Reduced Instruction Set Computer ЭВМ с сокращенным набором команд
RISC         
WIKIMEDIA DISAMBIGUATION PAGE
Risc

общая лексика

(Reduced Instruction Set Computing (technology)) вычисления с сокращённым набором команд, RISC-архитектура

архитектура процессоров, построенная на основе сокращённого набора команд. Характеризуется наличием команд фиксированной длины, большого количества регистров, операций типа регистр-регистр, а также отсутствием косвенной адресации. Концепция RISC разработана Джоном Коком (John Cocke) из IBM Research, название придумано профессором университета в Беркли Дэвидом Паттерсоном (David Patterson). Одним их недостатков RISC-архитектуры считается фиксированная длина команд, требующая для хранения программы большего объёма памяти

(Reduced Instruction Set Computer) компьютер с сокращённым набором команд

(Reduced Instruction Set Computer) компьютер с сокращенным набором команд

Reduced Instruction Set Computer         
см. RISC

Definitie

RISC
Reduced Instruction Set Code (Reference: CPU)

Wikipedia

Reduced instruction set computer

In computer engineering, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set computer (CISC), a RISC computer might require more instructions (more code) in order to accomplish a task because the individual instructions are written in simpler code. The goal is to offset the need to process more instructions by increasing the speed of each instruction, in particular by implementing an instruction pipeline, which may be simpler given simpler instructions.

The key operational concept of the RISC computer is that each instruction performs only one function (e.g. copy a value from memory to a register). The RISC computer usually has many (16 or 32) high-speed, general-purpose registers with a load–store architecture in which the code for the register-register instructions (for performing arithmetic and tests) are separate from the instructions that grant access to the main memory of the computer. The design of the CPU allows RISC computers few simple addressing modes and predictable instruction times that simplify design of the system as a whole.

The conceptual developments of the RISC computer architecture began with the IBM 801 project in the late 1970s, but these were not immediately put into use. Designers in California picked up the 801 concepts in two seminal projects, Stanford MIPS and Berkeley RISC. These were commercialized in the 1980s as the MIPS and SPARC systems. IBM eventually produced RISC designs based on further work on the 801 concept, the IBM POWER architecture, PowerPC, and Power ISA. As the projects matured, many similar designs, produced in the late 1980s and early 1990s, created the central processing units that increased the commercial utility of the Unix workstation and of embedded processors in the laser printer, the router, and similar products.

The varieties of RISC processor design include the ARC processor, the DEC Alpha, the AMD Am29000, the ARM architecture, the Atmel AVR, Blackfin, Intel i860, Intel i960, LoongArch, Motorola 88000, the MIPS architecture, the PA-RISC, the Power ISA, the RISC-V, the SuperH, and the SPARC. RISC processors are used in supercomputers, such as the Fugaku.

Voorbeelden uit tekstcorpus voor RISC
1. "If you regulate it too hard, the whole thing might dry up and blow away," says Patrick Jost, a terror finance expert with Risc Global, the UK consultancy.
2. We didn‘t expect a figure, but Acer were candid enough to acknowledge that "the Aspire L200 Living Centre is a stylish product and that people will pay a premium for that." Acer describes the product as the digital home‘s "vital building block." Acer‘s new product has nothing to do with Intel‘s technology bundle Acer even uses a rival RISC processor.
Vertaling van &#39RISC&#39 naar Russisch